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vc707: update constraints to match correct mmcm

This commit is contained in:
Wesley W. Terpstra 2018-01-23 14:28:56 -08:00
parent 9c38f20333
commit 506d2da883
1 changed files with 7 additions and 7 deletions
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14
xilinx/vc707/constraints/vc707-master.xdc
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@ -75,13 +75,13 @@ set_property -dict { PACKAGE_PIN AT30 IOSTANDARD LVCMOS18 IOB TRUE PULLUP TRU
set_clock_groups -asynchronous \
-group { clk_pll_i } \
-group { \
clk_out1_vc707_sys_clock_mmcm0 \
clk_out2_vc707_sys_clock_mmcm0 \
clk_out3_vc707_sys_clock_mmcm0 \
clk_out4_vc707_sys_clock_mmcm0 \
clk_out5_vc707_sys_clock_mmcm0 \
clk_out6_vc707_sys_clock_mmcm0 \
clk_out7_vc707_sys_clock_mmcm0 } \
clk_out1_vc707_sys_clock_mmcm2 \
clk_out2_vc707_sys_clock_mmcm2 \
clk_out3_vc707_sys_clock_mmcm2 \
clk_out4_vc707_sys_clock_mmcm2 \
clk_out5_vc707_sys_clock_mmcm2 \
clk_out6_vc707_sys_clock_mmcm2 \
clk_out7_vc707_sys_clock_mmcm2 } \
-group { \
clk_out1_vc707_sys_clock_mmcm1 \
clk_out2_vc707_sys_clock_mmcm1 } \