2017-08-16 20:23:45 +02:00
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# See LICENSE for license details.
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2017-10-04 03:24:18 +02:00
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# Set the variable for the directory that includes all scripts
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set scriptdir [file dirname [info script]]
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# Set up variables and Vivado objects
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source [file join $scriptdir "prologue.tcl"]
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# Initialize Vivado project files
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source [file join $scriptdir "init.tcl"]
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2017-08-16 20:23:45 +02:00
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# Synthesize the design
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source [file join $scriptdir "synth.tcl"]
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# Pre-implementation debug
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2017-10-04 03:24:18 +02:00
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if {[info exists pre_impl_debug_tcl]} {
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source [file join $scriptdir $pre_impl_debug_tcl]
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2017-08-18 20:27:02 +02:00
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}
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2017-08-16 20:23:45 +02:00
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# Post synthesis optimization
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source [file join $scriptdir "opt.tcl"]
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# Place the design
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source [file join $scriptdir "place.tcl"]
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# Route the design
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source [file join $scriptdir "route.tcl"]
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# Generate bitstream and save verilog netlist
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source [file join $scriptdir "bitstream.tcl"]
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# Post-implementation debug
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2017-10-04 03:24:18 +02:00
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if {[info exists post_impl_debug_tcl)]} {
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source [file join $scriptdir $post_impl_debug_tcl]
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2017-08-18 20:27:02 +02:00
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}
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2017-08-16 20:23:45 +02:00
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# Create reports for the current implementation
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source [file join $scriptdir "report.tcl"]
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