2017-08-20 01:58:56 +02:00
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# Koopman TOY CPU Interpreter
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This is a CPU interpreter, based on the specification of Phil Koopmans paper: "Microcoded Versus Hard-wired Control".<br>
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2017-08-20 20:04:36 +02:00
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For more details, have a look at /doc.
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2017-08-20 01:58:56 +02:00
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## Build
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2017-08-20 20:04:36 +02:00
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The project can be built by using `make`.
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2017-08-20 01:58:56 +02:00
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## Usage
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2017-08-20 12:16:23 +02:00
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Pass the RAM content to the machine via a text file.<br>
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The program call is: `toy_cpu` SOURCE.toy<br>
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The following is the specification for a 16 BIT machine word. With it, you can create the RAM content.<br>
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(Do not forget: this is a pure John von Neumann architecture, data and program in the same memory)<br>
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2017-08-20 01:58:56 +02:00
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<pre>
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OP_Code 0 (0000b): STORE<12 BIT ADDRESS>
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OP_Code 1 (0001b): LOAD <12 BIT ADDRESS>
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OP_Code 2 (0010b): JMPZ <12 BIT ADDRESS>
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OP_Code 3 (0011b): ADD <12 BIT ADDRESS>
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OP_Code 4 (0100b): SUB <12 BIT ADDRESS>
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OP_Code 5 (0101b): OR <12 BIT ADDRESS>
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OP_Code 6 (0110b): AND <12 BIT ADDRESS>
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OP_Code 7 (0111b): XOR <12 BIT ADDRESS>
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OP_Code 8 (1000b): NOT <12 BIT undefined>
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OP_Code 9 (1001b): INC <12 BIT undefined>
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OP_Code 10 (1010b): DEC <12 BIT undefined>
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OP_Code 11 (1011b): ZERO <12 BIT undefined>
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OP_Code 12 (1100b): NOP <12 BIT undefined>
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OP_Code 13 (1101b): NOP <12 BIT undefined>
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OP_Code 14 (1110b): NOP <12 BIT undefined>
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OP_Code 15 (1111b): NOP <12 BIT undefined>
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BIT |15 14 13 12|11 10 9 8 7 6 5 4 3 2 1 0|
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---------------------------------------
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| OP-CODE | ADDRESS |
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---------------------------------------
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</pre>
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This machine has the following registers:
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* 16 BIT Instruction Register (4 BIT OP, 12 BIT Adr)
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* 16 BIT Accumulator
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* 12 BIT Program Counter
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Example: 0001000000001010 on RAM position 0 <br>
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0001 means: LOAD the content of ADDRESS 000000001010 into the ACCU
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## Licence
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2017-08-20 20:04:36 +02:00
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This program by Michael Krause is licenced under the terms of the [GPLv3](https://www.gnu.org/licenses/gpl-3.0.de.html).
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2017-08-20 01:58:56 +02:00
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