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riscv
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sifive-blocks
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e4960a4e5a5572ff90ce8c682e945d04d8dc6b0d
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Wesley W. Terpstra
e4960a4e5a
sifive-blocks: update to new rocket API (
#43
)
2017-10-26 16:10:18 -07:00
src/main
/scala
sifive-blocks: update to new rocket API (
#43
)
2017-10-26 16:10:18 -07:00
vsrc
Updates to go with the fpga-shells directory
2017-08-17 18:12:49 -07:00
.gitignore
Add /target to .gitignore.
2016-11-30 13:29:54 -08:00
LICENSE
Initial commit.
2016-11-29 04:08:44 -08:00
S
Description
Freedom RTL blocks (
https://github.com/sifive/sifive-blocks
)
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Scala
99.8%
Verilog
0.2%
