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riscv/sifive-blocks
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9d2a173b15ff2f9c546d95261fd171cf6da51328
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Alex Solomatnikov 9d2a173b15 Initial (compilable) version of I2C (no actual logic yet)
2017-01-24 14:58:01 -08:00
src/main/scala
Initial (compilable) version of I2C (no actual logic yet)
2017-01-24 14:58:01 -08:00
vsrc
Initial commit.
2016-11-29 04:08:44 -08:00
.gitignore
Add /target to .gitignore.
2016-11-30 13:29:54 -08:00
LICENSE
Initial commit.
2016-11-29 04:08:44 -08:00
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Description
Freedom RTL blocks (https://github.com/sifive/sifive-blocks)
280 KiB
0 Stars 1 Watchers 0 Forks
Languages
Scala 99.8%
Verilog 0.2%
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