Wesley W. Terpstra 9c8fe44670 Merge pull request #14 from sifive/async-pcie ...

Async PCIe

2017-05-12 23:15:14 -07:00

src/main/scala

vc707mig: use an external ibuf

2017-05-12 23:07:10 -07:00

vsrc

Initial commit.

2016-11-29 04:08:44 -08:00

.gitignore

Add /target to .gitignore.

2016-11-30 13:29:54 -08:00

LICENSE

Initial commit.

2016-11-29 04:08:44 -08:00

Description

Freedom RTL blocks (https://github.com/sifive/sifive-blocks)

280 KiB

Languages

Scala 99.8%

Verilog 0.2%