Freedom RTL blocks (https://github.com/sifive/sifive-blocks)
75d6a7c6ea
Issue: Configuring the frame length to certain values causes incorrect operation. Symptoms: Certain frame lengths result in the master sending one extra clock pulse. The slave device may then become desynchronized. Workaround: The following frame lengths are supported and can be used. Do not use other frame lengths. * Serial mode: 0, 2, 4, 6, 8 * Dual mode: 0, 1, 3, 5, 7, 8 * Quad mode: 0, 1, 2, 3, 5, 6, 7, 8 |
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src/main/scala | ||
vsrc | ||
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LICENSE |