riscv/sifive-blocks
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Freedom RTL blocks (https://github.com/sifive/sifive-blocks)
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Scala 99.8%
Verilog 0.2%
072d0c1b58
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Megan Wachs 072d0c1b58 Merge pull request #2 from sifive/homogenous_bag_peripherals 
Use HeterogenousBag to handle lists of peripherals
2017-02-16 18:45:48 -08:00
src/main/scala Use HomogenousBag to handle lists of peripherals 2017-02-16 17:52:24 -08:00
vsrc Initial commit. 2016-11-29 04:08:44 -08:00
.gitignore Add /target to .gitignore. 2016-11-30 13:29:54 -08:00
LICENSE Initial commit. 2016-11-29 04:08:44 -08:00