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Merge pull request #7 from sifive/ndreset

MockAON: Accept the non-debug interrupt as an input to overall reset.
This commit is contained in:
Megan Wachs 2017-04-10 14:25:08 -07:00 committed by GitHub
commit ebd3ffa57e
2 changed files with 3 additions and 1 deletions

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@ -44,4 +44,5 @@ trait HasPeripheryMockAONModule extends HasTopLevelNetworksModule {
outer.coreplex.module.io.rtcToggle := outer.aon.module.io.rtc.asUInt.toBool outer.coreplex.module.io.rtcToggle := outer.aon.module.io.rtc.asUInt.toBool
outer.aon.module.io.ndreset := outer.coreplex.module.io.ndreset
} }

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@ -56,6 +56,7 @@ class MockAONWrapper(w: Int, c: MockAONParams)(implicit p: Parameters) extends L
val in = node.bundleIn val in = node.bundleIn
val ip = intnode.bundleOut val ip = intnode.bundleOut
val rtc = Clock(OUTPUT) val rtc = Clock(OUTPUT)
val ndreset = Bool(INPUT)
} }
val aon_io = aon.module.io val aon_io = aon.module.io
@ -99,7 +100,7 @@ class MockAONWrapper(w: Int, c: MockAONParams)(implicit p: Parameters) extends L
val lfclk = aon_io.lfclk val lfclk = aon_io.lfclk
val aonrst_catch = Module (new ResetCatchAndSync(3)) val aonrst_catch = Module (new ResetCatchAndSync(3))
aonrst_catch.reset := erst | aon_io.wdog_rst aonrst_catch.reset := erst | aon_io.wdog_rst | io.ndreset
aonrst_catch.clock := lfclk aonrst_catch.clock := lfclk
aon.module.reset := aonrst_catch.io.sync_reset aon.module.reset := aonrst_catch.io.sync_reset