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riscv
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rocket-chip
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fd2d48acda
rocket-chip
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src
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main
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scala
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Megan Wachs
fd2d48acda
lazy_module: If the user actually specifies a name, just use it without appending module name.
2016-10-25 15:58:09 -07:00
..
coreplex
Disable U-mode by default unless S-mode is present
2016-10-08 21:29:40 -07:00
diplomacy
lazy_module: If the user actually specifies a name, just use it without appending module name.
2016-10-25 15:58:09 -07:00
groundtest
tilelink2: move general-purpose code out of tilelink2 package
2016-10-03 16:22:28 -07:00
junctions
change the configuration interface of SlowIO
2016-09-29 22:16:53 -07:00
regmapper
regmapper RegisterCrossing: safe AsyncQueues are overkill here
2016-10-14 18:28:31 -07:00
rocket
initialize s2_hit to solve
#401
2016-10-21 14:53:55 -07:00
rocketchip
diplomacy: guess the LazyModule name from the containing class
2016-10-25 15:58:09 -07:00
uncore
diplomacy: add methods to find {out,in}ner-most common node
2016-10-25 15:58:09 -07:00
unittest
axi4: Test ToTL
2016-10-16 22:04:06 -07:00
util
AsyncQueue: cope with far reset propagation delay
2016-10-14 18:05:35 -07:00