riscv/rocket-chip
1
0
Fork 0
Code Releases Activity
Rocket Chip Generator (https://github.com/freechipsproject/rocket-chip)
84 Commits 1 Branch 0 Tags 13 MiB
Scala 93.1%
C++ 2.1%
Python 2%
Makefile 1.2%
Verilog 0.8%
Other 0.7%
efc623cc36
Go to file
Andrew Waterman efc623cc36 validate BTB address and use BTB for J/JAL/JR/JALR 
even if we weren't using the BTB for JR/JALR, we'd need to
flush the BTB on FENCE.I and on context switches, but
validating its result suffices instead.
2012-01-01 17:04:14 -08:00
rocket/src/main/scala validate BTB address and use BTB for J/JAL/JR/JALR 2012-01-01 17:04:14 -08:00