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rocket-chip
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rocket-chip
/
src
/
main
/
scala
/
uncore
History
Wesley W. Terpstra
eaf474a081
LFSR: use random intial value of the start register
...
We just need to make sure it doesn't initialize randomly stuck at 0.
2017-03-13 13:17:52 -07:00
..
agents
Heterogeneous Tiles (
#550
)
2017-02-09 13:59:09 -08:00
ahb
Tests: include more random delays
2017-03-11 02:53:43 -08:00
apb
Tests: include more random delays
2017-03-11 02:53:43 -08:00
axi4
Tests: include more random delays
2017-03-11 02:53:43 -08:00
coherence
copyright: ran scripts/modify-copyright
2016-11-27 22:15:43 -08:00
converters
Refactor Tile to use cake pattern (
#502
)
2017-01-16 18:24:08 -08:00
devices
rocket: use diplomatic interrupts
2017-03-02 21:19:23 -08:00
tilelink
Refactor Tile to use cake pattern (
#502
)
2017-01-16 18:24:08 -08:00
tilelink2
LFSR: use random intial value of the start register
2017-03-13 13:17:52 -07:00
util
Heterogeneous Tiles (
#550
)
2017-02-09 13:59:09 -08:00
Consts.scala
rocketchip: work-around
ucb-bar/chisel3#472
2017-01-31 14:20:02 -08:00
Package.scala
copyright: ran scripts/modify-copyright
2016-11-27 22:15:43 -08:00