Andrew Waterman e72e5a34b5 Fix storage of SP values in DP registers ...

The SFMA was zero-extending the SP value to 65 bits, rather than filling
the upper 32 bits with 1s.  This meant that an FSD + FLD of that register
would not restore the value properly.

Also, minor code cleanup.

2015-09-21 12:20:44 -07:00

rocket

Fix storage of SP values in DP registers

2015-09-21 12:20:44 -07:00

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Rocket Chip Generator (https://github.com/freechipsproject/rocket-chip)

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