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rocket-chip/vsrc
Megan Wachs dd4a50c452 Add JTAG DTM and test support in simulation
Initial cut

checkpoint which compiles and runs but there is some off-by-1 in the protocol

Debugging the clock crossing logic

checkpoint which works

Clean up the AsyncMailbox black box
2016-08-19 16:08:17 -07:00
..
AsyncFifo.v Add JTAG DTM and test support in simulation 2016-08-19 16:08:17 -07:00
DebugTransportModuleJtag.v Add JTAG DTM and test support in simulation 2016-08-19 16:08:17 -07:00
jtag_vpi.tab Add JTAG DTM and test support in simulation 2016-08-19 16:08:17 -07:00
jtag_vpi.v Add JTAG DTM and test support in simulation 2016-08-19 16:08:17 -07:00
rocketDTMTestHarness.v Add JTAG DTM and test support in simulation 2016-08-19 16:08:17 -07:00
SimDTM.v Write test harness in Chisel 2016-08-15 23:27:27 -07:00
TestDriver.v Write test harness in Chisel 2016-08-15 23:27:27 -07:00