Andrew Waterman d65e1a2eee vlsi verilog compiles now but doesn't simulate

2011-12-20 22:08:27 -08:00

rocket/src/main/scala

vlsi verilog compiles now but doesn't simulate

2011-12-20 22:08:27 -08:00

S

Description

Rocket Chip Generator (https://github.com/freechipsproject/rocket-chip)

13 MiB

0 Stars 1 Watchers 0 Forks

Languages

Scala 93.1%

C++ 2.1%

Python 2%

Makefile 1.2%

Verilog 0.8%

Other 0.7%