58 lines
1.7 KiB
Scala
58 lines
1.7 KiB
Scala
package rocket
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import Chisel._
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import Node._;
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import Constants._
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import Instructions._
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class ioALU extends Bundle(){
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val dw = UFix(INPUT, 1);
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val fn = UFix(INPUT, 4);
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val in2 = UFix(INPUT, 64);
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val in1 = UFix(INPUT, 64);
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val out = UFix(OUTPUT, 64);
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val adder_out = UFix(OUTPUT, 64);
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}
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class rocketDpathALU extends Component
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{
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val io = new ioALU();
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// ADD, SUB
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val sub = (io.fn === FN_SUB) || (io.fn === FN_SLT) || (io.fn === FN_SLTU)
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val adder_rhs = Mux(sub, ~io.in2, io.in2)
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val sum = (io.in1 + adder_rhs + sub.toUFix)(63,0)
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// SLT, SLTU
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val less = Mux(io.in1(63) === io.in2(63), sum(63),
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Mux(io.fn === FN_SLT, io.in1(63), io.in2(63)))
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// SLL, SRL, SRA
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val sra = (io.fn === FN_SRA)
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val shamt = Cat(io.in2(5) & (io.dw === DW_64), io.in2(4,0)).toUFix
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val shright = sra || (io.fn === FN_SR)
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val shin_hi_32 = Mux(sra, Fill(32, io.in1(31)), UFix(0,32))
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val shin_hi = Mux(io.dw === DW_64, io.in1(63,32), shin_hi_32)
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val shin = Cat(shin_hi, io.in1(31,0))
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val shout_r = (Cat(sra & shin(63), shin).toFix >> shamt)(63,0)
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val shout_l = (shin << shamt)(63,0)
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val bitwise_logic =
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Mux(io.fn === FN_AND, io.in1 & io.in2,
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Mux(io.fn === FN_OR, io.in1 | io.in2,
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Mux(io.fn === FN_XOR, io.in1 ^ io.in2,
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io.in2))) // FN_OP2
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val out64 =
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Mux(io.fn === FN_ADD || io.fn === FN_SUB, sum,
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Mux(io.fn === FN_SLT || io.fn === FN_SLTU, less,
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Mux(io.fn === FN_SR || io.fn === FN_SRA, shout_r,
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Mux(io.fn === FN_SL, shout_l,
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bitwise_logic))))
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val out_hi = Mux(io.dw === DW_64, out64(63,32), Fill(32, out64(31)))
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io.out := Cat(out_hi, out64(31,0)).toUFix
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io.adder_out := sum
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}
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