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Rocket Chip Generator (https://github.com/freechipsproject/rocket-chip)
290 Commits 1 Branch 0 Tags 13 MiB
Scala 93.1%
C++ 2.1%
Python 2%
Makefile 1.2%
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Andrew Waterman c09eeb7fd2 fix D$ next-state logic 
it was using the CPU command from the wrong pipeline stage,
which was a don't-care with ThreeStateIncoherence.
2012-03-07 01:42:08 -08:00
rocket/src/main/scala fix D$ next-state logic 2012-03-07 01:42:08 -08:00