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rocket-chip/uncore/src/main/scala
2015-04-17 16:55:20 -07:00
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bigmem.scala Removed broken or unfinished modules, new MemPipeIO converter 2014-09-24 15:11:24 -07:00
broadcast.scala TileLink refactor; TileLinkPorts now available. L2Banks no longer have unique ids (suitable for hierarhical P&R). 2015-04-17 16:55:20 -07:00
cache.scala TileLink refactor; TileLinkPorts now available. L2Banks no longer have unique ids (suitable for hierarhical P&R). 2015-04-17 16:55:20 -07:00
coherence.scala L2 Writeback bugfix 2015-03-10 01:15:03 -07:00
consts.scala Support for uncached sub-block reads and writes, major TileLink and CoherencePolicy refactor. 2015-02-01 20:37:16 -08:00
directory.scala New metadata-based coherence API 2015-02-28 17:32:03 -08:00
ecc.scala moved ecc lib to uncore, l2 checks for partial write masks when ecc is enabled 2015-04-06 12:22:23 -07:00
htif.scala TileLink refactor; TileLinkPorts now available. L2Banks no longer have unique ids (suitable for hierarhical P&R). 2015-04-17 16:55:20 -07:00
memserdes.scala TileLink refactor; TileLinkPorts now available. L2Banks no longer have unique ids (suitable for hierarhical P&R). 2015-04-17 16:55:20 -07:00
metadata.scala TileLink refactor; TileLinkPorts now available. L2Banks no longer have unique ids (suitable for hierarhical P&R). 2015-04-17 16:55:20 -07:00
network.scala refactor LNClients and LNManagers 2015-04-15 15:48:36 -07:00
package.scala add LICENSE 2014-09-12 15:31:38 -07:00
slowio.scala add LICENSE 2014-09-12 15:31:38 -07:00
tilelink.scala TileLink refactor; TileLinkPorts now available. L2Banks no longer have unique ids (suitable for hierarhical P&R). 2015-04-17 16:55:20 -07:00
uncore.scala TileLink refactor; TileLinkPorts now available. L2Banks no longer have unique ids (suitable for hierarhical P&R). 2015-04-17 16:55:20 -07:00
util.scala moved ecc lib to uncore, l2 checks for partial write masks when ecc is enabled 2015-04-06 12:22:23 -07:00