Schuyler Eldridge 4bcc42550e Remove JTAG vpi from VCS build ...

h/t @mwachs5

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>

2018-02-26 15:12:18 -05:00

..

.gitignore

Write test harness in Chisel

2016-08-15 23:27:27 -07:00

Makefile

Use vlsi_mem_gen for verilator flow

2017-08-07 20:36:22 -07:00

Makefrag

Remove JTAG vpi from VCS build

2018-02-26 15:12:18 -05:00

Makefrag-verilog

Don't pass deprecated -ffaaf option to firrtl (#1221)

2018-02-01 14:46:38 -08:00