riscv/rocket-chip
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Andrew Waterman a0c9452b86 change D$ to use FourStateCoherence protocol 
instead of ThreeStateIncoherence.
2012-03-07 01:26:35 -08:00
rocket/src/main/scala
change D$ to use FourStateCoherence protocol
2012-03-07 01:26:35 -08:00
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Description
Rocket Chip Generator (https://github.com/freechipsproject/rocket-chip)
13 MiB
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Scala 93.1%
C++ 2.1%
Python 2%
Makefile 1.2%
Verilog 0.8%
Other 0.7%