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riscv
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rocket-chip
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9de06f8c83
rocket-chip
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src
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main
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scala
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coreplex
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Megan Wachs
9de06f8c83
Merge remote-tracking branch 'origin/master' into debug_v013_pr
2017-03-30 08:01:11 -07:00
..
BaseCoreplex.scala
rocket: use diplomatic interrupts
2017-03-02 21:19:23 -08:00
Configs.scala
debug: Breaking change until FESVR is updated as well.
2017-03-27 21:19:08 -07:00
Coreplex.scala
rocketchip: pass variable l1tol2 connections into coreplex
2017-01-29 11:18:36 -08:00
CoreplexNetwork.scala
soc: compatible with "simple-bus" => scanned for platform devices
2017-03-30 00:36:23 -07:00
RISCVPlatform.scala
debug: Breaking change until FESVR is updated as well.
2017-03-27 21:19:08 -07:00
RocketTiles.scala
Merge remote-tracking branch 'origin/master' into debug_v013_pr
2017-03-30 08:01:11 -07:00