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rocket-chip/csrc
Megan Wachs e82328336e Add in a SimJTAG to connect to OpenOCD's remote-bitbang interface.
This is simpler than JTAGVPI and is supported better by Verilor.
It is also the same thing Spike uses.
2018-01-05 16:02:52 -08:00
..
comlog.cc copyright: ran scripts/modify-copyright 2016-11-27 22:15:43 -08:00
emulator.cc Add in a SimJTAG to connect to OpenOCD's remote-bitbang interface. 2018-01-05 16:02:52 -08:00
float_fix.cc copyright: ran scripts/modify-copyright 2016-11-27 22:15:43 -08:00
jtag_vpi.c jtag_vpi: Attempt to more aggressively flush the simulator output as it is needed by other listeners 2017-05-26 11:48:45 -07:00
remote_bitbang.cc Add in a SimJTAG to connect to OpenOCD's remote-bitbang interface. 2018-01-05 16:02:52 -08:00
remote_bitbang.h Add in a SimJTAG to connect to OpenOCD's remote-bitbang interface. 2018-01-05 16:02:52 -08:00
SimDTM.cc debug: Fixes in how the SimDTM was hooked up to FESVR 2017-03-28 21:13:45 -07:00
SimJTAG.cc Add in a SimJTAG to connect to OpenOCD's remote-bitbang interface. 2018-01-05 16:02:52 -08:00
verilator.h add STOP_COND to emulator & match vsim PRINTF_COND 2016-09-09 11:07:17 -07:00