riscv/rocket-chip
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rocket-chip/vsrc
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mwachs5 77a0f76289 Cleanup jtag dtm (#342) 
* debug: Clean up Debug TransportModule synchronizer

With async reset async queues, I feel its safe/cleaner
to remove the one-off "AsyncMailbox verilog black-box
and use the common primitive.

I also added some comments about correct usage of this
block. Probably the 'TRST' signal should be renamed
to make it less confusing, as it requires some processing
of the real JTAG 'TRST' signal.
2016-09-26 11:10:27 -07:00
..
AsyncResetReg.v util: Do BlackBox Async Set/Reset Registers more properly (#305) 2016-09-16 13:50:09 -07:00
AsyncSetReg.v util: Do BlackBox Async Set/Reset Registers more properly (#305) 2016-09-16 13:50:09 -07:00
DebugTransportModuleJtag.v fix warnings in verilog source (#274) 2016-09-12 18:25:35 -07:00
jtag_vpi.tab Add JTAG DTM and test support in simulation 2016-08-19 16:08:17 -07:00
jtag_vpi.v fix warnings in verilog source (#274) 2016-09-12 18:25:35 -07:00
SimDTM.v Write test harness in Chisel 2016-08-15 23:27:27 -07:00
TestDriver.v Correct Merge Conflitct -- clock, not clk (#327) 2016-09-21 20:02:01 -07:00