7c0c48fac4
We need this to work for our chip, and it's not been tested in a long time in upstream -- it didn't even used to build since the Nasti conversion. This makes a few changes: * Rather than calling the backup memory port parameters MEM_*, it calls them MIF_* (to match the MIT* paramater objects). A new name was necessary because the Nasti stuff is now dumped as MEM_*, which has similar names but incompatible values. * p(MIFDataBits) was changed back to 128, as otherwise the backup memory port doesn't work (it only send half a TileLink transaction). 64 also causes readmemh to bail out, but changing the elf2hex parameters works around that. * A configuration was added that enabled the backup memory port in the tester. While this is kind of an awkward way to do it, I want to make sure I can start testing this regularly and this makes it easy to integrate. |
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| .. | ||
| Backends.scala | ||
| Configs.scala | ||
| DeviceSet.scala | ||
| DeviceTree.scala | ||
| Fpga.scala | ||
| Network.scala | ||
| RocketChip.scala | ||
| TestBench.scala | ||
| TestConfigs.scala | ||
| Testing.scala | ||
| Vlsi.scala | ||
| ZscaleChip.scala | ||