History

Palmer Dabbelt 770f2742de Make NastiMemorySelector a subtype of NastiInterconnect

When RocketChip has a single memory configuration I want to ensure no extra
hardware is being generated by only instantiating a NastiMemoryInterconnect
rather than a NastiMemorySelector, which I believe will insert a Mux with 0
when there is only one config (because there aren't any 0-width wires allowed).

2016-02-17 10:41:01 -08:00

project

source and build files. source code pulled from uncore and zscale repos

2015-07-29 18:02:58 -07:00

src/main/scala

Make NastiMemorySelector a subtype of NastiInterconnect

2016-02-17 10:41:01 -08:00

.gitignore

Initial commit

2015-07-28 15:52:07 -07:00

build.sbt

Add ability to generate libraryDependency on cde.

2015-10-22 09:52:26 -07:00

LICENSE

Update LICENSE

2015-07-28 16:07:30 -07:00

README.md

Update README.md

2015-07-28 16:20:18 -07:00

README.md

junctions

A repository for peripheral components and IO devices associated with the RocketChip project.

To uses these modules, include this repo as a git submodule within the your chip repository and add it as Project in your chip's build.scala. These components are only dependent on Chisel, i.e.

lazy val junctions = project.dependsOn(chisel)