Wesley W. Terpstra 830d01329d RationalCrossing: add some documentation		2017-01-26 21:27:34 -08:00
..
config	Configs: use a uniform syntax without Match exceptions (#507)	2017-01-13 14:41:19 -08:00
coreplex	coreplex: provide coherence managers with geometry information	2017-01-23 15:50:39 -08:00
diplomacy	diplomacy: find names of LazyModules also in Seq() member values (#527)	2017-01-24 18:10:37 -08:00
groundtest	[tracegen] remove TL1 noisemaker, use io.finish and catch simulation exit (#528)	2017-01-25 12:10:49 -08:00
junctions	Refactor Tile to use cake pattern (#502)	2017-01-16 18:24:08 -08:00
regmapper	copyright: ran scripts/modify-copyright	2016-11-27 22:15:43 -08:00
rocket	rocket: L1 only needs cache-line transfer sizes	2017-01-19 19:07:14 -08:00
rocketchip	coreplex: support multiple memory channels via diplomatic trickery	2017-01-19 19:07:14 -08:00
uncore	RationalCrossing: add some documentation	2017-01-26 21:27:34 -08:00
unittest	tilelink2: add a rational clock crossing adapter	2017-01-26 20:07:28 -08:00
util	RationalCrossing: add some documentation	2017-01-26 21:27:34 -08:00