100 lines
3.0 KiB
Scala
100 lines
3.0 KiB
Scala
package rocket
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import Chisel._
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import Node._
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import Constants._
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import uncore._
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import collection.mutable.ArrayBuffer
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object DummyTopLevelConstants extends rocket.constants.CoherenceConfigConstants with rocket.constants.MulticoreConstants {
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val NTILES = 1
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val ENABLE_SHARING = true
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val ENABLE_CLEAN_EXCLUSIVE = true
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}
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import DummyTopLevelConstants._
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case class Configuration(ntiles: Int, co: CoherencePolicyWithUncached)
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class Top extends Component
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{
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val co = if(ENABLE_SHARING) {
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if(ENABLE_CLEAN_EXCLUSIVE) new MESICoherence
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else new MSICoherence
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} else {
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if(ENABLE_CLEAN_EXCLUSIVE) new MEICoherence
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else new MICoherence
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}
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implicit val conf = Configuration(NTILES, co)
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val io = new Bundle {
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val debug = new ioDebug
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val host = new ioHost(HTIF_WIDTH)
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val mem = new ioMemPipe
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}
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val htif = new rocketHTIF(HTIF_WIDTH)
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val hub = new CoherenceHubBroadcast(NTILES+1, co)
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hub.io.tiles(NTILES) <> htif.io.mem
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io.host <> htif.io.host
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io.mem.req_cmd <> Queue(hub.io.mem.req_cmd)
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io.mem.req_data <> Queue(hub.io.mem.req_data, REFILL_CYCLES)
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hub.io.mem.resp <> Pipe(io.mem.resp)
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Assert(hub.io.mem.resp.ready, "hub.io.mem.resp.ready")
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var error_mode = Bool(false)
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for (i <- 0 until NTILES) {
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val hl = htif.io.cpu(i)
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val tl = hub.io.tiles(i)
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val tile = new Tile(resetSignal = hl.reset)
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tile.io.host.reset := Reg(Reg(hl.reset))
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tile.io.host.pcr_req <> Queue(hl.pcr_req)
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hl.pcr_rep <> Queue(tile.io.host.pcr_rep)
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hl.ipi_req <> Queue(tile.io.host.ipi_req)
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tile.io.host.ipi_rep <> Queue(hl.ipi_rep)
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error_mode = error_mode || Reg(tile.io.host.debug.error_mode)
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tl.xact_init <> Queue(tile.io.tilelink.xact_init)
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tl.xact_init_data <> Queue(tile.io.tilelink.xact_init_data)
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tile.io.tilelink.xact_abort <> Queue(tl.xact_abort)
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tile.io.tilelink.xact_rep <> Queue(tl.xact_rep, 1, pipe = true)
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tl.xact_finish <> Queue(tile.io.tilelink.xact_finish)
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tile.io.tilelink.probe_req <> Queue(tl.probe_req)
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tl.probe_rep <> Queue(tile.io.tilelink.probe_rep, 1)
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tl.probe_rep_data <> Queue(tile.io.tilelink.probe_rep_data)
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tl.incoherent := hl.reset
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}
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io.debug.error_mode := error_mode
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}
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object top_main {
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def main(args: Array[String]): Unit = {
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val top = args(0)
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val chiselArgs = ArrayBuffer[String]()
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var i = 1
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while (i < args.length) {
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val arg = args(i)
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arg match {
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case "--NUM_PVFB" => {
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hwacha.Constants.NUM_PVFB = args(i+1).toInt
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i += 1
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}
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case "--WIDTH_PVFB" => {
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hwacha.Constants.WIDTH_PVFB = args(i+1).toInt
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hwacha.Constants.DEPTH_PVFB = args(i+1).toInt
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i += 1
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}
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case "--CG" => {
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hwacha.Constants.coarseGrained = true
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}
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case any => chiselArgs += arg
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}
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i += 1
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}
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chiselMain(chiselArgs.toArray, () => Class.forName(top).newInstance.asInstanceOf[Component])
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}
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}
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