4c595d175c
* Refactors package hierarchy. Additionally: - Removes legacy ground tests and configs - Removes legacy bus protocol implementations - Removes NTiles - Adds devices package - Adds more functions to util package
26 lines
645 B
Scala
26 lines
645 B
Scala
// See LICENSE.Berkeley for license details.
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package freechips.rocketchip.util
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import Chisel._
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class LatencyPipe[T <: Data](typ: T, latency: Int) extends Module {
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val io = new Bundle {
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val in = Decoupled(typ).flip
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val out = Decoupled(typ)
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}
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def doN[T](n: Int, func: T => T, in: T): T =
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(0 until n).foldLeft(in)((last, _) => func(last))
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io.out <> doN(latency, (last: DecoupledIO[T]) => Queue(last, 1, pipe=true), io.in)
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}
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object LatencyPipe {
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def apply[T <: Data](in: DecoupledIO[T], latency: Int): DecoupledIO[T] = {
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val pipe = Module(new LatencyPipe(in.bits, latency))
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pipe.io.in <> in
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pipe.io.out
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}
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}
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