89 lines
3.2 KiB
Scala
89 lines
3.2 KiB
Scala
// See LICENSE.SiFive for license details.
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package freechips.rocketchip.tilelink
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import Chisel._
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import chisel3.internal.sourceinfo.SourceInfo
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import freechips.rocketchip.config.Parameters
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import freechips.rocketchip.diplomacy._
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// q is the probability to delay a request
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class TLDelayer(q: Double)(implicit p: Parameters) extends LazyModule
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{
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val node = TLIdentityNode()
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require (0.0 <= q && q < 1)
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lazy val module = new LazyModuleImp(this) {
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val io = new Bundle {
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val in = node.bundleIn
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val out = node.bundleOut
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}
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def feed[T <: Data](sink: DecoupledIO[T], source: DecoupledIO[T], noise: T) {
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val allow = UInt((q * 65535.0).toInt) <= LFSR16(source.valid)
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sink.valid := source.valid && allow
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source.ready := sink.ready && allow
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sink.bits := source.bits
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when (!sink.valid) { sink.bits := noise }
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}
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(io.in zip io.out) foreach { case (in, out) =>
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val anoise = Wire(in.a.bits)
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anoise.opcode := LFSRNoiseMaker(3)
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anoise.param := LFSRNoiseMaker(3)
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anoise.size := LFSRNoiseMaker(anoise.params.sizeBits)
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anoise.source := LFSRNoiseMaker(anoise.params.sourceBits)
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anoise.address := LFSRNoiseMaker(anoise.params.addressBits)
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anoise.mask := LFSRNoiseMaker(anoise.params.dataBits/8)
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anoise.data := LFSRNoiseMaker(anoise.params.dataBits)
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val bnoise = Wire(out.b.bits)
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bnoise.opcode := LFSRNoiseMaker(3)
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bnoise.param := LFSRNoiseMaker(3)
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bnoise.size := LFSRNoiseMaker(bnoise.params.sizeBits)
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bnoise.source := LFSRNoiseMaker(bnoise.params.sourceBits)
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bnoise.address := LFSRNoiseMaker(bnoise.params.addressBits)
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bnoise.mask := LFSRNoiseMaker(bnoise.params.dataBits/8)
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bnoise.data := LFSRNoiseMaker(bnoise.params.dataBits)
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val cnoise = Wire(in.c.bits)
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cnoise.opcode := LFSRNoiseMaker(3)
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cnoise.param := LFSRNoiseMaker(3)
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cnoise.size := LFSRNoiseMaker(cnoise.params.sizeBits)
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cnoise.source := LFSRNoiseMaker(cnoise.params.sourceBits)
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cnoise.address := LFSRNoiseMaker(cnoise.params.addressBits)
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cnoise.data := LFSRNoiseMaker(cnoise.params.dataBits)
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cnoise.error := LFSRNoiseMaker(1)(0)
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val dnoise = Wire(out.d.bits)
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dnoise.opcode := LFSRNoiseMaker(3)
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dnoise.param := LFSRNoiseMaker(3)
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dnoise.size := LFSRNoiseMaker(dnoise.params.sizeBits)
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dnoise.source := LFSRNoiseMaker(dnoise.params.sourceBits)
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dnoise.sink := LFSRNoiseMaker(dnoise.params.sinkBits)
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dnoise.addr_lo := LFSRNoiseMaker(dnoise.params.addrLoBits)
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dnoise.data := LFSRNoiseMaker(dnoise.params.dataBits)
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dnoise.error := LFSRNoiseMaker(1)(0)
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val enoise = Wire(in.e.bits)
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enoise.sink := LFSRNoiseMaker(enoise.params.sinkBits)
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feed(out.a, in.a, anoise)
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feed(out.c, in.c, cnoise)
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feed(out.e, in.e, enoise)
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feed(in.b, out.b, bnoise)
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feed(in.d, out.d, dnoise)
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}
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}
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}
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object TLDelayer
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{
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// applied to the TL source node; y.node := TLDelayer(0.01)(x.node)
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def apply(q: Double)(x: TLOutwardNode)(implicit p: Parameters, sourceInfo: SourceInfo): TLOutwardNode = {
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val delayer = LazyModule(new TLDelayer(q))
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delayer.node := x
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delayer.node
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}
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}
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