130 lines
2.6 KiB
Scala
130 lines
2.6 KiB
Scala
package Top
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{
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import Chisel._
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import Node._;
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import scala.math._;
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object log2up
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{
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def apply(in: Int) = ceil(log(in)/log(2)).toInt
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}
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object FillInterleaved
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{
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def apply(n: Int, in: Bits) =
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{
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var out = Fill(n, in(0))
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for (i <- 1 until in.getWidth)
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out = Cat(Fill(n, in(i)), out)
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out
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}
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}
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object Reverse
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{
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def apply(in: Bits) =
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{
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var out = in(in.getWidth-1)
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for (i <- 1 until in.getWidth)
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out = Cat(in(in.getWidth-i-1), out)
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out
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}
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}
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class Mux1H(n: Int, w: Int) extends Component
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{
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val io = new Bundle {
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val sel = Vec(n) { Bool(dir = 'input) }
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val in = Vec(n) { Bits(width = w, dir = 'input) }
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val out = Bits(width = w, dir = 'output)
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}
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if (n > 1) {
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var out = io.in(0) & Fill(w, io.sel(0))
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for (i <- 1 to n-1)
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out = out | (io.in(i) & Fill(w, io.sel(i)))
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io.out := out
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} else {
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io.out := io.in(0)
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}
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}
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class ioDecoupled[T <: Data]()(data: => T) extends Bundle
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{
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val valid = Bool('input)
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val ready = Bool('output)
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val bits = data.asInput
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}
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class ioArbiter[T <: Data](n: Int)(data: => T) extends Bundle {
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val in = Vec(n) { (new ioDecoupled()) { data } }
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val out = (new ioDecoupled()) { data }.flip()
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}
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class Arbiter[T <: Data](n: Int)(data: => T) extends Component {
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val io = new ioArbiter(n)(data)
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io.in(0).ready := io.out.ready
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for (i <- 1 to n-1) {
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io.in(i).ready := !io.in(i-1).valid && io.in(i-1).ready
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}
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var dout = io.in(n-1).bits
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for (i <- 1 to n-1)
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dout = Mux(io.in(n-1-i).valid, io.in(n-1-i).bits, dout)
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var vout = io.in(0).valid
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for (i <- 1 to n-1)
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vout = vout || io.in(i).valid
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vout ^^ io.out.valid
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dout ^^ io.out.bits
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}
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class ioPriorityDecoder(in_width: Int, out_width: Int) extends Bundle
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{
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val in = UFix(in_width, 'input);
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val out = Bits(out_width, 'output);
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}
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class priorityDecoder(width: Int) extends Component
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{
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val in_width = ceil(log10(width)/log10(2)).toInt;
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val io = new ioPriorityEncoder(in_width, width);
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val l_out = Wire() { Bits() };
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for (i <- 0 to width-1) {
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when (io.in === UFix(i, in_width)) {
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l_out <== Bits(1,1) << UFix(i);
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}
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}
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l_out <== Bits(0, width);
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io.out := l_out;
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}
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class ioPriorityEncoder(in_width: Int, out_width: Int) extends Bundle
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{
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val in = Bits(in_width, 'input);
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val out = UFix(out_width, 'output);
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}
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class priorityEncoder(width: Int) extends Component
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{
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val out_width = ceil(log10(width)/log10(2)).toInt;
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val io = new ioPriorityDecoder(width, out_width);
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val l_out = Wire() { UFix() };
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for (i <- 0 to width-1) {
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when (io.in(i).toBool) {
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l_out <== UFix(i, out_width);
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}
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}
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l_out <== UFix(0, out_width);
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io.out := l_out;
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}
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}
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