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riscv
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rocket-chip
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36aa4bcc9dc3b8d1055b8cafef343a5c00263e09
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Rimas Avizienis
36aa4bcc9d
moved exception handling from ex stage in dpath to mem stage in ctrl
2011-11-10 02:26:26 -08:00
rocket/src/main
/scala
moved exception handling from ex stage in dpath to mem stage in ctrl
2011-11-10 02:26:26 -08:00
Description
Rocket Chip Generator (
https://github.com/freechipsproject/rocket-chip
)
13
MiB
Languages
Scala
93.1%
C++
2.1%
Python
2%
Makefile
1.2%
Verilog
0.8%
Other
0.7%