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riscv/rocket-chip
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22c6f728c319e7f35f6f601beabf9095b26abd2d
rocket-chip/src/main/scala
T
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Megan WachsandAndrew Waterman 22c6f728c3 debug: Use flags for resume instead of program buffer. Untested.
2017-04-07 16:47:16 -07:00
..
config
Configs: use a uniform syntax without Match exceptions (#507)
2017-01-13 14:41:19 -08:00
coreplex
debug: Make it easier to override parts of the Default Debug Config (#655)
2017-04-06 10:33:17 -07:00
diplomacy
GenerateBootROM: use compiled DTB
2017-03-24 18:18:01 -07:00
groundtest
Fix regression in groundtest DummyPTW
2017-03-28 00:56:14 -07:00
jtag
Add ucb-art/chisel-jtag (#612)
2017-03-26 18:03:21 -07:00
junctions
debug: Remove older version of JTAG interface as it is superseded by the one in jtag package.
2017-03-27 21:25:37 -07:00
regmapper
copyright: ran scripts/modify-copyright
2016-11-27 22:15:43 -08:00
rocket
Don't signal access exceptions on invalid PTEs
2017-04-05 21:46:55 -07:00
rocketchip
Debug Controls (#639)
2017-04-03 13:31:35 -07:00
tile
Remove splitMetadata option from L1 caches
2017-03-30 15:48:55 -07:00
uncore
debug: Use flags for resume instead of program buffer. Untested.
2017-04-07 16:47:16 -07:00
unittest
apb: put both aFlow options under regression
2017-03-16 15:36:14 -07:00
util
Util: Add ResetCatchAndSync for synchronous deassert of Async Reset (#615)
2017-03-27 03:29:07 -07:00
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