Henry Cook 0fe2899c74 [tracegen] remove TL1 noisemaker, use io.finish and catch simulation exit (#528)

2017-01-25 12:10:49 -08:00

..

BusMasterTest.scala

copyright: ran scripts/modify-copyright

2016-11-27 22:15:43 -08:00

CacheFillTest.scala

copyright: ran scripts/modify-copyright

2016-11-27 22:15:43 -08:00

Comparator.scala

copyright: ran scripts/modify-copyright

2016-11-27 22:15:43 -08:00

Configs.scala

[tracegen] remove TL1 noisemaker, use io.finish and catch simulation exit (#528)

2017-01-25 12:10:49 -08:00

Coreplex.scala

Refactor Tile to use cake pattern (#502)

2017-01-16 18:24:08 -08:00

Generator.scala

copyright: ran scripts/modify-copyright

2016-11-27 22:15:43 -08:00

Package.scala

copyright: ran scripts/modify-copyright

2016-11-27 22:15:43 -08:00

Regression.scala

copyright: ran scripts/modify-copyright

2016-11-27 22:15:43 -08:00

TestHarness.scala

coreplex: support multiple memory channels via diplomatic trickery

2017-01-19 19:07:14 -08:00

Tile.scala

Refactor Tile to use cake pattern (#502)

2017-01-16 18:24:08 -08:00

Top.scala

coreplex: support multiple memory channels via diplomatic trickery

2017-01-19 19:07:14 -08:00

TraceGen.scala

[tracegen] remove TL1 noisemaker, use io.finish and catch simulation exit (#528)

2017-01-25 12:10:49 -08:00

TrafficGenerator.scala

copyright: ran scripts/modify-copyright

2016-11-27 22:15:43 -08:00

Util.scala

copyright: ran scripts/modify-copyright

2016-11-27 22:15:43 -08:00