riscv/rocket-chip
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Andrew Waterman 0bfb2962a6 Assume coh.isRead returns true for store-conditional 
This requires an uncore update.
2015-09-25 15:26:11 -07:00
rocket
Assume coh.isRead returns true for store-conditional
2015-09-25 15:26:11 -07:00
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Description
Rocket Chip Generator (https://github.com/freechipsproject/rocket-chip)
13 MiB
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Scala 93.1%
C++ 2.1%
Python 2%
Makefile 1.2%
Verilog 0.8%
Other 0.7%