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riscv
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rocket-chip
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Matthew Naylor
04be438847
Avoid conflicting assigments to registers in timers. Give priority to start over stop.
2016-03-16 12:54:19 -07:00
groundtest
Avoid conflicting assigments to registers in timers. Give priority to start over stop.
2016-03-16 12:54:19 -07:00
Description
Rocket Chip Generator (
https://github.com/freechipsproject/rocket-chip
)
13
MiB
Languages
Scala
93.1%
C++
2.1%
Python
2%
Makefile
1.2%
Verilog
0.8%
Other
0.7%
