96 lines
2.6 KiB
Scala
96 lines
2.6 KiB
Scala
// See LICENSE.SiFive for license details.
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// See LICENSE.Berkeley for license details.
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package freechips.rocketchip.util
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import Chisel._
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/** Timer with a statically-specified period.
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* Can take multiple inflight start-stop events with ID
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* Will continue to count down as long as at least one event is inflight
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*/
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class Timer(initCount: Int, maxInflight: Int) extends Module {
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val io = new Bundle {
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val start = Valid(UInt(width = log2Up(maxInflight))).flip
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val stop = Valid(UInt(width = log2Up(maxInflight))).flip
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val timeout = Valid(UInt(width = log2Up(maxInflight)))
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}
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val inflight = Reg(init = Vec.fill(maxInflight) { Bool(false) })
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val countdown = Reg(UInt(width = log2Up(initCount)))
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val active = inflight.reduce(_ || _)
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when (active) { countdown := countdown - UInt(1) }
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when (io.start.valid) {
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inflight(io.start.bits) := Bool(true)
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countdown := UInt(initCount - 1)
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}
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when (io.stop.valid) { inflight(io.stop.bits) := Bool(false) }
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io.timeout.valid := countdown === UInt(0) && active
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io.timeout.bits := PriorityEncoder(inflight)
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assert(!io.stop.valid || inflight(io.stop.bits),
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"Timer stop for transaction that's not inflight")
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}
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/** Simplified Timer with a statically-specified period.
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* Can be stopped repeatedly, even when not active.
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*/
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class SimpleTimer(initCount: Int) extends Module {
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val io = new Bundle {
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val start = Bool(INPUT)
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val stop = Bool(INPUT)
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val timeout = Bool(OUTPUT)
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}
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val countdown = Reg(UInt(width = log2Up(initCount)))
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val active = Reg(init = Bool(false))
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when (active) { countdown := countdown - UInt(1) }
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when (io.start) {
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active := Bool(true)
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countdown := UInt(initCount - 1)
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}
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when (io.stop) { active := Bool(false) }
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io.timeout := countdown === UInt(0) && active
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}
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object SimpleTimer {
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def apply(initCount: Int, start: Bool, stop: Bool): Bool = {
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val timer = Module(new SimpleTimer(initCount))
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timer.io.start := start
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timer.io.stop := stop
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timer.io.timeout
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}
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}
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/** Timer with a dynamically-specified period. */
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class DynamicTimer(w: Int) extends Module {
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val io = new Bundle {
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val start = Bool(INPUT)
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val period = UInt(INPUT, w)
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val stop = Bool(INPUT)
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val timeout = Bool(OUTPUT)
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}
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val countdown = Reg(init = UInt(0, w))
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val active = Reg(init = Bool(false))
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when (io.start) {
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countdown := io.period
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active := Bool(true)
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} .elsewhen (io.stop || countdown === UInt(0)) {
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active := Bool(false)
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} .elsewhen (active) {
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countdown := countdown - UInt(1)
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}
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io.timeout := countdown === UInt(0) && active
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}
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