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rocket-chip/src/main/scala/util/LatencyPipe.scala

26 lines
645 B
Scala

// See LICENSE.Berkeley for license details.
package freechips.rocketchip.util
import Chisel._
class LatencyPipe[T <: Data](typ: T, latency: Int) extends Module {
val io = new Bundle {
val in = Decoupled(typ).flip
val out = Decoupled(typ)
}
def doN[T](n: Int, func: T => T, in: T): T =
(0 until n).foldLeft(in)((last, _) => func(last))
io.out <> doN(latency, (last: DecoupledIO[T]) => Queue(last, 1, pipe=true), io.in)
}
object LatencyPipe {
def apply[T <: Data](in: DecoupledIO[T], latency: Int): DecoupledIO[T] = {
val pipe = Module(new LatencyPipe(in.bits, latency))
pipe.io.in <> in
pipe.io.out
}
}