100 lines
4.2 KiB
Scala
100 lines
4.2 KiB
Scala
// See LICENSE.SiFive for license details.
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package freechips.rocketchip.tilelink
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import Chisel._
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import freechips.rocketchip.config.Parameters
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import freechips.rocketchip.diplomacy._
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import scala.math.{min,max}
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class TLFilter(
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Mfilter: TLManagerParameters => Option[TLManagerParameters] = TLFilter.Midentity,
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Cfilter: TLClientParameters => Option[TLClientParameters] = TLFilter.Cidentity
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)(implicit p: Parameters) extends LazyModule
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{
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val node = TLAdapterNode(
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clientFn = { cp => cp.copy(clients = cp.clients.flatMap { c =>
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val out = Cfilter(c)
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out.map { o => // Confirm the filter only REMOVES capability
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require (c.sourceId.contains(o.sourceId))
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require (c.supportsProbe.contains(o.supportsProbe))
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require (c.supportsArithmetic.contains(o.supportsArithmetic))
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require (c.supportsLogical.contains(o.supportsLogical))
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require (c.supportsGet.contains(o.supportsGet))
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require (c.supportsPutFull.contains(o.supportsPutFull))
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require (c.supportsPutPartial.contains(o.supportsPutPartial))
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require (c.supportsHint.contains(o.supportsHint))
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require (!c.requestFifo || o.requestFifo)
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}
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out
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})},
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managerFn = { mp => mp.copy(managers = mp.managers.flatMap { m =>
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val out = Mfilter(m)
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out.map { o => // Confirm the filter only REMOVES capability
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o.address.foreach { a => require (m.address.map(_.contains(a)).reduce(_||_)) }
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require (o.regionType <= m.regionType)
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// we allow executable to be changed both ways
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require (m.supportsAcquireT.contains(o.supportsAcquireT))
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require (m.supportsAcquireB.contains(o.supportsAcquireB))
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require (m.supportsArithmetic.contains(o.supportsArithmetic))
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require (m.supportsLogical.contains(o.supportsLogical))
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require (m.supportsGet.contains(o.supportsGet))
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require (m.supportsPutFull.contains(o.supportsPutFull))
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require (m.supportsPutPartial.contains(o.supportsPutPartial))
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require (m.supportsHint.contains(o.supportsHint))
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require (!o.fifoId.isDefined || m.fifoId == o.fifoId)
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}
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out
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})})
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lazy val module = new LazyModuleImp(this) {
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(node.in zip node.out) foreach { case ((in, edgeIn), (out, edgeOut)) =>
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out <> in
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}
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}
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}
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object TLFilter
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{
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def Midentity: TLManagerParameters => Option[TLManagerParameters] = { m => Some(m) }
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def Cidentity: TLClientParameters => Option[TLClientParameters] = { c => Some(c) }
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def Mmask(select: AddressSet): TLManagerParameters => Option[TLManagerParameters] = { m =>
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val filtered = m.address.map(_.intersect(select)).flatten
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val alignment = select.alignment /* alignment 0 means 'select' selected everything */
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val maxTransfer = 1 << 30
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val capTransfer = if (alignment == 0 || alignment > maxTransfer) maxTransfer else alignment.toInt
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val cap = TransferSizes(1, capTransfer)
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if (filtered.isEmpty) { None } else {
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Some(m.copy(
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address = filtered,
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supportsAcquireT = m.supportsAcquireT .intersect(cap),
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supportsAcquireB = m.supportsAcquireB .intersect(cap),
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supportsArithmetic = m.supportsArithmetic.intersect(cap),
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supportsLogical = m.supportsLogical .intersect(cap),
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supportsGet = m.supportsGet .intersect(cap),
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supportsPutFull = m.supportsPutFull .intersect(cap),
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supportsPutPartial = m.supportsPutPartial.intersect(cap),
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supportsHint = m.supportsHint .intersect(cap)))
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}
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}
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def Mnocache: TLManagerParameters => Option[TLManagerParameters] = { m =>
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if (m.supportsAcquireB) None else Some(m)
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}
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def Mcache: TLManagerParameters => Option[TLManagerParameters] = { m =>
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if (m.supportsAcquireB) Some(m) else None
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}
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def Cnocache: TLClientParameters => Option[TLClientParameters] = { c =>
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if (c.supportsProbe) None else Some(c)
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}
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// applied to the TL source node; y.node := TLBuffer(x.node)
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def apply(
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Mfilter: TLManagerParameters => Option[TLManagerParameters] = TLFilter.Midentity,
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Cfilter: TLClientParameters => Option[TLClientParameters] = TLFilter.Cidentity
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)(implicit p: Parameters): TLNode =
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{
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val filter = LazyModule(new TLFilter(Mfilter, Cfilter))
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filter.node
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}
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}
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