24 lines
597 B
Scala
24 lines
597 B
Scala
// See LICENSE.SiFive for license details.
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package freechips.rocketchip.groundtest
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import Chisel._
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import freechips.rocketchip.util.ValidMux
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class GroundTestStatus extends Bundle {
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val finished = Bool(OUTPUT)
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val timeout = Valid(UInt(width = 4))
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val error = Valid(UInt(width = 4))
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}
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object DebugCombiner {
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def apply(debugs: Seq[GroundTestStatus]): GroundTestStatus = {
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val out = Wire(new GroundTestStatus)
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out.finished := debugs.map(_.finished).reduce(_ && _)
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out.timeout := ValidMux(debugs.map(_.timeout))
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out.error := ValidMux(debugs.map(_.error))
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out
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}
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}
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