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riscv
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rocket-chip
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13
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ce01ab2700
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3 Commits
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SHA1
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Wesley W. Terpstra
722b0d521f
bootrom: also setup SBI a0+a1 for when we hang (
#617
)
...
This way a program started by the debugger still has the DTB handy.
2017-03-27 00:01:05 -07:00
Wesley W. Terpstra
34f8ce653a
bootrom: follow SBI (a0=hartid, a1=dtb)
2017-03-24 18:18:01 -07:00
Howard Mao
dd1fed41b6
generate BootROM contents from assembly code
2016-08-05 16:39:21 -07:00