10 Commits

Author	SHA1	Message	Date
Megan Wachs	c85333f826	Merge remote-tracking branch 'origin/test_mode_reset' into test_mode_reset	2017-09-17 13:51:46 -07:00
Megan Wachs	215e072e5c	test_mode_reset: fix typos	2017-09-17 13:51:40 -07:00
Henry Cook	9b75dd7e5b	Merge branch 'master' into test_mode_reset	2017-09-15 17:26:11 -07:00
Megan Wachs	641a8e7eab	test_mode_reset: Correct some gender issues. Tie off signals in the test harness	2017-09-15 16:36:35 -07:00
Megan Wachs	6cda4504ac	test_mode_reset: use a cleaner interface with bundles and options instead of individual signals	2017-09-15 12:30:39 -07:00
Megan Wachs	a0396b63e8	test_mode_reset: fix one bulk-connect gender issue	2017-09-14 13:16:13 -07:00
Megan Wachs	82c00cb656	reset_catch: Allow Test Mode Overrides	2017-09-14 13:16:13 -07:00
Henry Cook	b86f4b9bb7	config: use Field defaults over Config defaults ... Also rename some keys that had the same class name as their value's class name.	2017-09-13 11:25:42 -07:00
Megan Wachs	8783d51c97	jtag_vpi: Use Parameterized Black Box to allow TestHarnesses to override the clock speed	2017-08-14 17:25:47 -07:00
Henry Cook	01ca3efc2b	Combine Coreplex and System Module Hierarchies (#875) ... * coreplex collapse: peripherals now in coreplex * coreplex: better factoring of TLBusWrapper attachement points * diplomacy: allow monitorless :*= and :=* * rocket: don't connect monitors to tile tim slave ports * rename chip package to system * coreplex: only sbus has a splitter * TLFragmenter: Continuing my spot battles on requires without explanatory strings * pbus: toFixedWidthSingleBeatSlave * tilelink: more verbose requires * use the new system package for regression * sbus: add more explicit FIFO attachment points * delete leftover top-level utils * cleanup ResetVector and RTC	2017-07-23 08:31:04 -07:00