Howard Mao
c4117eb9a2
make sure TL parameters change properly throughout
...
* Outermost TL parameters should have the width set to be the same as the
MIF data width.
* Broadcast Hub and Narrower, which use different sets of TL parameters
should use the proper set of parameters at each interface
2015-10-14 18:03:39 -07:00
Howard Mao
a44e054c77
add support for different TileLink and MIF data widths
2015-10-13 12:46:23 -07:00
Howard Mao
a76f0bf8fb
fix involuntary release bug in rocket ProbeUnit
2015-09-30 17:26:48 -07:00
Howard Mao
353b00c8a1
revert some Chisel3-related changes and fix tlb bugs
2015-09-26 22:08:06 -07:00
Howard Mao
c517d9f6e3
fix htif emulator constructor in vcs_main
2015-09-25 17:21:09 -07:00
Howard Mao
7b0167b92e
make sure SCR and PCR data width matches xLen
2015-09-25 12:13:22 -07:00
Howard Mao
0e67d824b4
fix NASTI interconnect bug
2015-09-25 12:12:34 -07:00
Howard Mao
0d763524ef
make sure conf address map scales with number of cores
2015-09-25 09:41:19 -07:00
Howard Mao
5e3f9115d3
make sure HTIF mem_mb doesn't exceed MMIOBase
2015-09-25 09:02:35 -07:00
Howard Mao
c20ed350a0
even more Chisel3 compatability changes
2015-09-24 17:55:41 -07:00
Howard Mao
1c0111cc70
uncore merge commit
2015-09-24 17:10:45 -07:00
Howard Mao
8d4d8680bf
replace NASTIMasterIO and NASTISlaveIO with NASTIIO
2015-09-24 16:59:13 -07:00
Howard Mao
4a85c5a510
pull in hardfloat fixes
2015-09-24 16:58:49 -07:00
Howard Mao
38a9b23ce7
add a flag to only log and dump after a certain number of cycles
2015-09-22 10:32:31 -07:00
Howard Mao
4496e8d4e2
make sure htif_emulator properly sets memory size
2015-09-22 10:32:31 -07:00
Howard Mao
56ecdff52d
Implement NASTI-based Mem/IO interconnect
2015-09-22 10:32:31 -07:00
Howard Mao