Wesley W. Terpstra
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05beb20dc4
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tilelink2: specify the minLatency for SRAM+RR
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2016-09-22 15:18:54 -07:00 |
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Wesley W. Terpstra
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76d8ed6a69
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tilelink2: remove 'strided'; !contiguous is clearer
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2016-09-17 16:14:25 -07:00 |
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Wesley W. Terpstra
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e437508548
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tilelink2: track interrupt connectivity like in TL2
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2016-09-17 14:43:48 -07:00 |
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Wesley W. Terpstra
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dae0918c85
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tilelink2 RegisterRouter: support undefZero
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2016-09-16 16:09:00 -07:00 |
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Wesley W. Terpstra
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dd19e0911e
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tilelink2: handle bus width=1
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2016-09-15 22:15:11 -07:00 |
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Wesley W. Terpstra
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30fa4ea956
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RegisterRouter: compress register mapping for sparse devices
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2016-09-15 21:28:56 -07:00 |
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Wesley W. Terpstra
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91e7da4de3
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tilelink2: make RegisterRouter constructor args public
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2016-09-15 21:28:56 -07:00 |
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Wesley W. Terpstra
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9560df537c
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tilelink2 RegisterRouter: allow sub-4k devices in order to make useful unit tests
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2016-09-12 10:32:24 -07:00 |
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Wesley W. Terpstra
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66f58cf2d0
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tilelink2 RegisterRouter: support new TL2 interrupts
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2016-09-08 15:25:50 -07:00 |
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Wesley W. Terpstra
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d2421654c4
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tilelink2: refactor address into addr_hi on ABC and addr_lo on CD
We need addr_lo in order to properly convert widths.
As part of the refactoring, move all methods out of the Bundles
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2016-09-06 23:46:44 -07:00 |
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Wesley W. Terpstra
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cb54df0a8a
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tilelink2: tie off unused channels
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2016-09-05 20:58:41 -07:00 |
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Wesley W. Terpstra
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4746cf00ce
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tilelink2: move files to new uncore directory
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2016-09-05 20:58:40 -07:00 |
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