riscv/rocket-chip
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Author SHA1 Message Date
Schuyler Eldridge e50e4d4c84 build.scala uses space-delimited ROCKETCHIP_ADDONS 2015-12-09 14:17:16 -05:00
Schuyler Eldridge f200d0947a Force C++ emulator to always use 1GB for MEM_SIZE 
Fixes #17
 2015-09-24 23:56:41 -04:00
Schuyler Eldridge b4cd8c5981 Fix vlsi_mem_gen for Python 2 or 3 2015-06-25 12:48:31 -07:00
Schuyler Eldridge a42832fc70 Fix fpga_mem_gen for Python 2 and 3 Environments 
Two quick fixes that enable fpga_mem_gen to work with either Python 2 or
Python 3:
* Change an `xrange` instance to `range`
* Wrap the arguments of a bare `print` in parentheses
 2015-06-25 11:03:33 -07:00