5 Commits

Author	SHA1	Message	Date
Wesley W. Terpstra	8c7d469a95	Revert "async_queue: Give names to all the registers which show up in the queue (#390)" ... This reverts commit a84a961a39. The changes to RegisterCrossing.scala were unneeded after application of this branch. The name changes made to the AsyncQueue.scala are reapplied at the end of this branch.	2016-10-10 13:13:31 -07:00
mwachs5	a84a961a39	async_queue: Give names to all the registers which show up in the queue (#390) ... This is to aid debugging but even more so for backend constraint writers, who generally need predictable names for registers to set false paths, etc.	2016-10-08 17:50:50 -07:00
mwachs5	e952f8f222	asyncqueue: Fix typo in the Async Queue (#381) ... * asyncqueue: Fix typo in the Async Queue that would cause the sync depth to be one less than expected. * asyncqueue: Typo in the typo fix	2016-10-04 21:02:06 -07:00
Wesley W. Terpstra	20f42a8762	tilelink2: reuse the halves of the AsyncQueue	2016-09-29 17:35:08 -07:00
Howard Mao	9910c69c67	Move a bunch more things into util package ... A lot of utility code was just being imported willy-nilly from one package to another. This moves the common code into util to make things more sensible. The code moved were * The AsyncQueue and AsyncDecoupledCrossing from junctions. * All of the code in rocket's util.scala * The BlackBox asynchronous reset registers from uncore.tilelink2 * The implicit definitions from uncore.util	2016-09-29 14:23:42 -07:00