riscv/rocket-chip
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Author SHA1 Message Date
Andrew WatermanandHenry Cook f1cb06142e bump tools 2017-01-11 13:21:55 -08:00
Andrew WatermanandHenry Cook 71c4b000b3 Don't special-case power-of-2 replacement policy for BTB 
PLRU wasn't implemented correctly for the BTB, since it wasn't
increasing the priority on replacement, only on usage.  Regardless,
this should be a second-order effect, so using FIFO always is fine.
 2017-01-11 13:21:55 -08:00
Andrew WatermanandHenry Cook 5f3fb64ef0 Per ABI, only x1 and x5 should be treated as function returns 
We were doing so for x3 and x7, as well, which could reduce performance
for compilers that happen to perform indirect jumps via t2 (x7).
 2016-11-22 12:01:05 -08:00
Andrew WatermanandHoward Mao 8a7fc75b53 fix metadata race in blocking L1 DCache 2016-07-28 17:54:28 -07:00