riscv/rocket-chip
1
0
Fork 0
Code Releases Activity
6 Commits 1 Branch 0 Tags
3129040bda033ae34deffc14f7c4f8f3e0b58f8d
Commit Graph
3 Commits
This Branch
This Branch
All Branches
Author SHA1 Message Date
Andrew Waterman 3129040bda use divided clk for htif. UDPATE YOUR FESVR 
by default, we now load programs via a backdoor, because otherwise
it takes too long to simulate.
 2012-03-15 18:36:51 -07:00
Andrew Waterman 2607153b67 Merge branch 'master' of github.com:ucb-bar/riscv-rocket 2012-03-09 02:08:55 -08:00
Andrew Waterman 71c8d3fd41 reorganize directory structure 2012-02-08 15:13:08 -08:00