This website requires JavaScript.
Explore
Help
Sign In
riscv
/
rocket-chip
Watch
1
Star
0
Fork
0
Code
Releases
Activity
4,180
Commits
1
Branch
0
Tags
2a413e4496c21b1a8e1ecd621dff71063fe8bd24
Commit Graph
2 Commits
This Branch
This Branch
All Branches
Author
SHA1
Message
Date
Leway Colin
and
Wesley W. Terpstra
1322a02637
Fixed Hasti can't handle N masters to one slave
#571
(
#576
)
2017-03-13 20:36:53 -07:00
Leway Colin
and
Henry Cook
87d909e996
Fix HastiTestSRAM can't R/W byte when HSIZE is 0 (
#563
)
2017-02-24 10:37:26 -08:00