Andrew Waterman
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058396aefe
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[rocket] Implement RVC
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2016-07-29 17:56:42 -07:00 |
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Andrew Waterman
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9949347569
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First stab at debug interrupts
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2016-06-01 16:57:10 -07:00 |
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Andrew Waterman
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51379621d6
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Flush blocking D$ on FENCE.I
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2016-05-31 19:27:28 -07:00 |
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Andrew Waterman
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c104b57c52
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Use BitPat implicit conversion in instruction decoder
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2016-05-26 22:23:21 -07:00 |
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Andrew Waterman
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9aa724706e
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Don't include RV64 instructions in RV32 decode table
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2016-05-25 14:26:45 -07:00 |
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Andrew Waterman
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42f079ce57
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JAL requires DW_XPR
This has been benign so far because of how the logic minimization worked.
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2016-05-24 15:05:41 -07:00 |
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Andrew Waterman
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335e2c8a1e
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Support disabling atomics extension
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2016-05-24 15:05:41 -07:00 |
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Andrew Waterman
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491184a8f8
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ERET -> xRET; remove mcfgaddr
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2016-04-30 17:32:51 -07:00 |
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Andrew Waterman
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7ae44d4905
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Add RV32 support
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2016-03-10 17:32:00 -08:00 |
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Andrew Waterman
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bc15e8649e
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WIP on priv spec v1.9
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2016-03-02 23:29:58 -08:00 |
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Andrew Waterman
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d4c94c6566
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Chisel3 has different Vec semantics
Vec(a, b) := c doesn't modify a and b in chisel3.
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2015-08-03 19:08:00 -07:00 |
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Andrew Waterman
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049fc8dc24
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Chisel3 compatibility: use BitPat for don't-cares
This one's hella ugly, but for the time being, idgaf.
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2015-07-28 02:48:49 -07:00 |
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Andrew Waterman
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cc447c8110
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Refactor pipeline RTL (merge ctrl + dpath into rocket)
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2015-07-21 17:10:56 -07:00 |
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