4 Commits

Author	SHA1	Message	Date
Yunsup Lee	1cfd9f5a0e	add LICENSE	2014-09-12 10:15:04 -07:00
Andrew Waterman	cfa86dba4f	add FPGA test bench ... The memory models now support back pressure on the response.	2013-05-02 04:59:32 -07:00
Andrew Waterman	bbd010750f	add missing #include	2013-01-06 04:53:40 -08:00
Andrew Waterman	d911e635d6	simplify c++ memory models; support +dramsim flag ... works for both vlsi and emulator	2012-12-04 07:04:26 -08:00